GL3525
USB 3.2 Gen1 Hub Controller
Genesys GL3525 is a 7-port, low-power, and configurable hub controller. It is compliant with the USB 3.2 specification. GL3525 integrates Genesys Logic self-developed USB 3.2 Gen 1 Super Speed transmitter/receiver physical layer (PHY) and USB 2.0 High-Speed PHY. It supports Super Speed, Hi-Speed, and Full-Speed USB connections and is fully backward compatible to all USB 2.0 and USB 1.1 hosts. GL3525 also implements multiple TT* (Note1) architecture providing dedicated TT* to each downstream (DS) port, which guarantees Full-Speed (FS) data passing bandwidth when multiple FS devices perform heavy loading operations. Furthermore, GL3525 has built-in 5V to 3.3V and 5V to 1.2V regulators, which saves customers’ BOM cost, and eases for PCB design.
GL3525 features the native fast-charging and complies with USB-IF battery charging specification rev1.2, it could fast-charge Apple, Samsung Galaxy devices, and any device complaint with BC1.2/1.1. It also allows portable devices to draw up to 1.5A from GL3525 charging downstream ports (CDP1) or dedicated charging port (DCP2). It can enable systems to fast charge handheld devices even during “Sleep” and “Power-off” modes.
The available package for GL3525 is listed in the following table.
GL3525 features the native fast-charging and complies with USB-IF battery charging specification rev1.2, it could fast-charge Apple, Samsung Galaxy devices, and any device complaint with BC1.2/1.1. It also allows portable devices to draw up to 1.5A from GL3525 charging downstream ports (CDP1) or dedicated charging port (DCP2). It can enable systems to fast charge handheld devices even during “Sleep” and “Power-off” modes.
The available package for GL3525 is listed in the following table.
| Product Series | Package Type | Number of DFPs | Power Mgmt. | LED Support |
|---|---|---|---|---|
| GL3525 | QFN 88 | 4 SS + 3 HS | Individual/ Gang | Green/Amber |
GL3525 Packages
*Note: TT (transaction translator) implements the control logic defined in Section 11.14 ~ 11.22 of USB specification revision 2.0. TT basically handles the unbalanced traffic speed between the USPORT (operating in HS) and DSPORTS (operating in FS/LS) of hub.
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1 CDP, charging downstream port, the Battery Charging Rev.1.2-compliant USB port that does data communication and charges device up to 1.5A.
2 DCP, dedicated charging port, the Battery Charging Rev.1.2-compliant USB port that only charges devices up to 1.5A, similar to wall chargers.
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Compliant with USB 3.2 Gen 1 Specification
- Upstream port supports SuperSpeed (SS), HighSpeed (HS) and FullSpeed (FS) traffic
- Downstream ports support SS, HS, FS, and LowSpeed (LS) traffic
- 1 control pipe and 1 interrupt pipe
- Backward compatible to USB specification Revision 2.0/1.1
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Featuring fast-charging
- Compliant with USB Battery Charging Specification Revision 1.2, supporting CDP, DCP, and ACA-Dock modes
- Each downstream port can be configured as Standard Downstream Port (SDP), Charging Downstream Port (CDP), or Dedicated Charging Port (DCP)
- Supporting device charging when upstream VBUS is not present, suitable for wall-charger applications
- Supporting Apple 1A / 2.1A / 2.4A and Samsung Galaxy fast-charging profiles
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ECDSA Prime256 hardware encryption engine integrated for firmware verification
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Firmware recovery supported
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Multiple Transaction Translator (TT) architecture
- Providing dedicated TT control logics for each downstream port
- Superior performance when multiple FS devices operate concurrently
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Integrated USB transceiver
- Improving output drivers with slew-rate control for EMI reduction
- Internal power-fail detection for ESD recovery
- Advanced power management and low power consumption
- Supporting USB 3.2 U0/U1/U2/U3 power management states
- Supporting USB Link Power Management (LPM) L0/L1/L2
- Supporting individual/gang mode over-current detection for all downstream ports
- Supporting both low/high-enabled power switches
- Patented Smart Power Management
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Configurable settings by firmware in SPI flash
- Per-port configurable charging modes: CDP/DCP/Apple mode
- Configurable downstream port number, with individual USB3.2/USB2.0 enable/disable control
- Supporting full in-system firmware upgrade via SPI flash
- Supporting compound device configuration (non-removable downstream ports)
- Supporting customizable VID/PID
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Flexible design
- Supporting Poly-fuse/Power-switch
- Supporting electrical tuning for each specific port
- Supporting programmable breathing LED
- Supporting register setting by firmware
- Supporting vendor/HID command
- Allow downstream ports to connect up to 11 devices, 4 x USB3.2 non-removable devices + 7 x USB2.0 non-removable devices
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Low BOM cost
- Single external 25 MHz crystal / Oscillator clock input
- Built-in upstream port 1.5KΩ pull-up and downstream port 15KΩ pull-down resistors
- Built-in 5 to 3.3V and 5 to 1.2V regulator
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Miscellaneous
- Multiple upstream ports supported with customized switching mechanism
- Hostbridge supported
- USB keyboard hotkey detection on the single assigned port
- Billboard/USB-C bridge integrated
- HID integrated
- I2C hardware engines supporting either master or slave mode
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Applications
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Standalone USB hub/Docking station
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Tablet/Ultrabook/NB
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Motherboard
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Monitor built-in hub, GPIOs can be programmed as I2C interface to easily update scalar firmware through USB interface
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TV built-in hub
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Compound device, such as hub-reader application
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USB wall charger
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Other consumer electronics
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Customized applications
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Dynamically disable/enable ports
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GPIO signaling of ambient light sensor or rotation/position sensor
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GL3525
